Rockwell-automation 1746-HSCE2 Multi-Channel High Speed Counter Module Bedienungsanleitung Seite 105
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Publication 1746-UM002B-EN-P - August 2004
Application Examples 6-13
Ladder File 9 - HSCE2 Initialization Routine
Programming ladder file 9 shows the block transfer function required
to set up the programming blocks in this example.
0000
LES
Less Than (A<B)
Source A N11:0
140<
Source B N11:1
140<
DATA_BLOCK_POINTER
N12:10
15
HSCE2_TRNSMIT
N12:0
15
HSCE2_ACK
COP
Copy File
Source #N10:[N11:0]
Dest #N12:10
Length 8
#BTW_DATA
L
N12:10
15
HSCE2_TRNSMIT
0001
N12:10
15
HSCE2_TRNSMIT
N12:0
15
HSCE2_ACK
U
N12:10
15
HSCE2_TRNSMIT
MEQ
Masked Equal
Source N12:0
770<
Mask 6000h
8192<
Compare 0
0<
ADD
Add
Source A N11:0
140<
Source B 10
10<
Dest N11:0
140<
DATA_BLOCK_POINTER
0002
EQU
Equal
Source A N11:0
140<
Source B N11:1
140<
DATA_BLOCK_POINTER
N12:10
15
HSCE2_TRNSMIT
N12:0
15
HSCE2_ACK
COP
Copy File
Source #N10:[N11:0]
Dest #N12:10
Length 8
#BTW_DATA
L
B3:0
0
HSCE2_INIT_DONE
0003
N12:0
15
HSCE2_ACK
N12:0
13
HSCE2_PERR
N12:0
14
HSCE2_FAULT
L
B3:0
1
HSCE2_ERROR
0004
END
If the blocks have not all been transmitted (block data pointer < max block offset), copy next block to the HSCE2 and set transmit bit
(N12:10/15).
When HSCE2 sets its acknowledge bit (N12:0/15), reset the module handshaking bit (N12:10/15) and check HSCE2 programming
error bit (N12:0/13). If no error bits are ON, increment the block counter to permit the next block move to start.
When the last block is completed (block data offset = max block offset), copy the Counter Control Block to the HSCE2.
Note: The Counter Control Block does not require a 0-1 positive transition of the transmit bit to operate.
If BTR returns a programming error bit, set HSCE2 error bit (B3/3).
- Multi-Channel High 1
- Speed Counter 1
- Important User Information 2
- Table of Contents 3
- Chapter 3 4
- Installation and Wiring 4
- Chapter 4 4
- Configuration and Programming 4
- Table of Contents iii 5
- Chapter 5 6
- Start Up, Operation 6
- Chapter 6 6
- Application Examples 6
- Table of Contents v 7
- Table of Contents vi 8
- Summary of Changes 9
- New Information 9
- 2 Summary of Changes 10
- Who Should Use This 11
- Purpose of This Manual 11
- Related Documentation 12
- Conventions Used In This 13
- Your Questions or 13
- Comments on the Manual 13
- 4 Preface 14
- Module Overview 15
- Operation 16
- Module Overview 1-3 17
- Operating Class 18
- Hardware Features 19
- 1-6 Module Overview 20
- Module Operation 21
- Input Configurations 22
- Pulse/Internal Direction 23
- Up and Down Pulses 23
- 12321012 23
- X1 Quadrature Encoder 24
- X2 Quadrature Encoder 24
- X4 Quadrature Encoder 24
- Input Frequency 25
- Gate/Preset Modes 26
- Store/Hold/Resume 27
- Store/Preset/Hold/Resume 27
- Store/Preset/Start 27
- Summary of Available 28
- Counter Configurations 28
- Counter Types 29
- Rate Value 30
- Output Control 31
- Range Control 32
- Counter Input Data 34
- Class 1 Operation 35
- Class 4 Operation 36
- Input Word Bit Values 37
- Output State Byte 38
- Counter Status Bytes 38
- Module Operation 2-19 39
- 2-20 Module Operation 40
- Prevent Electrostatic 42
- Discharge 42
- Setting the Jumpers 42
- Installing the Module 43
- Important Wiring 44
- Considerations 44
- Electronic Protection 46
- Input and Output 47
- Connections 47
- Encoder Wiring 48
- Programming Cycle 52
- Data Format 53
- Reading the Data 54
- Writing the Data 54
- Module Setup Block 56
- INT: Interrupt Enable 57
- RVF: Rate Value Format 57
- PRA: Program Range Allocation 57
- Op Mode: Operating Mode 58
- Range Allocation Values 58
- Range Allocation Examples 59
- Counter Configuration 60
- TRMT: Transmit Bit 61
- CType: Counter Type Bit 62
- Minimum/Maximum Count 63
- Value Block 63
- CNTR No.: Counter Number Bits 65
- Preset Value 65
- Minimum/Maximum Rate 66
- Program Ranges Block 69
- Rtype: Range Type 71
- Range No.: Range Number Bits 71
- (Words 2 to 5) 72
- (Word 6, Bits 00 to 07) 72
- Counter Control Block 73
- Transmit Bit 74
- Control Words 74
- ENn: Enable Counter (n) Bit 74
- SPn: Soft Preset Only (n) Bit 75
- P(n): Program Counter (n) Bit 76
- Output ON (OR) Mask 76
- Output Enable Mask 76
- Enable Range 77
- Programming Block Default 78
- Debug Mode 83
- Troubleshooting 84
- Module Programming Errors 85
- Application Errors 86
- Counter Value Does Not Change 87
- Output Does Not Turn On 87
- Output Does Not Turn Off 88
- Soft Preset Does Not Work 88
- Debug Mode Operation 89
- In the Program Ranges Block 91
- Example 1 - Direct 94
- Addressing 94
- Ladder File 9 Continued 96
- Example 2 - Indirect 99
- Ladder File 8 - HSCE2 100
- Example 3 - Block Transfers 102
- Ladder File 8 Continued 104
- Example 4 - Using Soft 106
- Example 5 - Change Presets 110
- Dynamically 110
- Example 6 - Retentive 115
- Counters 115
- Specifications 119
- Inputs A, B, and Z 120
- Outputs (sourcing) 120
- On-State Current Derating 121
- A-4 Specifications 122
- Appendix 123
- Frequently Asked Questions 129
- Glossary 133
- Glossary 2 134
- 2 Index 136
- Index 3 137
- 4 Index 138
- Rockwell Automation 140
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